Associate Professor of Electrical Engineering & Coordinator of Information Technology Programs
Gildart Haase School of Computer Science and Engineering
Kalyan Mondal earned his Ph.D. in Electrical Engineering from the University of California at Santa Barbara and M.Tech. in Computer and System Sciences from the University of Kolkata, India. He has 24 years of industrial experience with Bell Laboratories, AT&T, Lucent Technologies, Agere Systems and 11 years of academic experience at UCSB, Lehigh University, and FDU.
EENG3224 - Digital Signal Processing (Using MATLAB)
EENG3288 - Microprocessor System Design II (Using Freescale HCS12 microcontroller and C on CodeWarrior)
EENG4375 - Energy Conversion Systems (Using MATLAB)
EENG4800 - Independent Study in Electrical Engineering
EENG6633 - Digital Signal Processing (Using MATLAB)
EENG7715 - Integrated Circuit Devices (Using Synopsys TCAD)
EENG7753 - Applications of Digital Signal Processing (Using MATLAB & SIMULINK)
EENG7755 - VLSI Systems (Using Mentor Graphics CAD)
EENG7852 - DSP with C on DSP Processors (Using TI TMS320C6713 DSK & CCS)
EENG8891 - Co-op / Internship
EGTG2215 - Circuits I
ENGR3200 - Advanced Engineering Programming (Using C++ on MS Visual Studio)
INFO4205 - Information Technology Capstone Project
MSEE program; EE graduate certificates; BSIT programs; IT undergraduate certificates; IT bridge programs; 5-yr combined BSIT/MS programs; Articulations
* LabVIEW based Touchscreen Control Panel - Spring 2011 (Siddiq Ahmed, Michael Irene, Corey Sigur )
* LabVIEW based System Fault Detection - Spring 2010 (Richard Tomek, Louis Yanez )
* Embedded System Labs - Spring 2009 (Dmitriy Kalantarov )
* DSP Subsystem Implementation on VLSI - Summer & Fall 2008 (Hemant Koka & Shivaram T.)
* Wireless Link Studies using IEEE 802.11a, 802.16d PHY SIMULINK Models - MS Thesis: Spring 2007 - Summer 2008 (Pranesh Shah)
* Comparative Studies on Media Acceess Controllers in Ethernet & Wireless LAN: Fall 2007 - Spring 2008 (Maoon Rashed)
* VHDL Design of a Booth Encoded Parallel Multiplier on Mentor Graphics VLSI Design System - Fall 2006 (Rajeev Argula & Deepthi Nandigum)
* Speech Coding Studies using a MATLAB ADPCM Model - Fall 2006 (Dov Alperin)
Other R&D Projects:
* 2D Interpolation in Frequency Domain
* Decision Feedback Equalizer based upon Statistical Eye
* Multi-stage Decimators for Sigma-Delta A/D Converters
* Aperture Functions for Sparse Arrays in Ultrasound Scanners
* Performance Characterization of Cooperative WiMAX Systems
* PCI-Express to IEEE 1394b Host Controller IC Design: 2005-6 (Agere Systems)
* Amba AHB to RapidIO Bridge IP Development: 2003-4 (Agere Systems)
* OC-48 Sonet Add Drop Multiplexer IC Design: 1999-2002 (Agere Systems)
* DTV Baseband Demodulator IC Design: 1997-8 (Lucent Technologies)
* Variable Baud Rate Cable Demodulator IC Design: 1995-6 (Lucent Technologies)
* MPEG-2 Simple Profile Video Decoder IC Design: 1992-4 (AT&T Bell Laboratories)
* Automated DSP VLSI Layout Generators: 1987-91 (AT&T Bell Laboratories)
* 32-b Floating-Point DSP IC Design: 1983-5 (Bell Laboratories)
* “Introducing Secure Coding Concepts in Engineering Programming,” Proc. ASEE Mid-Atlantic Symposium, NYC College of Technology, NY, April 2013.
* "Non-recursive Decimation Filters with Arbitrary Integer Decimation Factors," IET Circuits, Devices, and Systems, vol 6, no 3, pp 141-151, 2012.
* “Teaching an Embedded System Course to Electrical Engineering and Technology Students,” Proc. ASEE Mid-Atlantic Symposium, Farmingdale State Univ, NY, Apr. 2011.
* “General Polynomial Factorization-Based Design of Sparse Periodic Linear Arrays," IEEE Trans. on Ultrasonics, Ferroelectrics and Frequency Control, vol. 57, no. 9, pp. 1952-1966, Sep. 2010.
* "Constrained Statistical Decision Feedback Equalization," under revision.
* “Fixed WiMAX Downlink Spectral Efficiency and Throughput Measurements under Channel Impairments", CSIE09, Los Angeles, April 2009.
* “Design of Sparse Arrays with High Sidelobe Rejection”, 2008 IEEE Asia Pacific Conference on Circuits and Systems, Macao, China, December 2008.
* “Challenges in Teaching a Digital Signal Processing Course to International Graduate Students”, ASEE Mid-Atlantic Spring 2007 Conference, NJIT, April 2007.
* "Channel Sequencing Using a Round-Robin Scheduler”, US Patent 6,791,991, September 2004.
* "Adaptive Frequency Correction In A Wireless Communications System, Such As For GSM And IS54", US Patent 6,522,696, February 2003.
* “Fixed clock based arbitrary symbol rate timing recovery loop”, US Patent 6,295,325, September 2001.
* “Variable Baudrate QAM Demodulation Scheme”, US Patent 6,282,248, August 2001.
* “Trellis Decoder for Real-Time Video Rate Decoding and Deinterleaving”, US Patent 6,094,739, July 2000.
* “Amplitude based coarse automatic gain control circuit”, US Patent 6,081,565, June 2000.
* “DVB Frame Synchronization”, US Patent 6,072,839, June 2000.
* “A Digital Television Demodulator IC with 256 Tap Equalizer”, Invited Paper, Proc.1999 IEEE International Solid State Circuits Conference, p. 336, February 1999
* “Equalizer Filter Configuration for Processing Real-Valued and Complex-Valued Signal Samples”, US Patent 5,912,828, June 1999.
* “Digital Television System Architecture and Chip Set”, Invited Paper, CODEC 98, Calcutta, January 1998.
* “HDTV/DTV – New Technologies”, Invited Talk in International Business Communications High Definition & Digital Television Seminar, Las Vegas, pp. 117-140, December 1997.
Links of interest:
Kalyan Mondal is an engineering and technology educator involved in teaching advanced courses in Digital Signal Processing, VLSI Design, Integrated Circuit Devices, Embedded System Design, Power Systems, and Object-oriented Programming. He is involved with curriculum development, student advising, student projects, and ABET accreditation. As the coordinator of the Information Technology program, he develops curriculum, advises students, and guides them through their capstone projects. He oversees the activities of FDU CCIA as its Founding Director, develops curriculum and seeks out funding. He has been successful twice in getting FDU designated as a CAE/CDE by NSA & DHS.
1000 River Road, (T-MU1-01)
Teaneck, NJ 07666
Director, Center for Cybersecurity and Information Assurance (CCIA)
Founded and manage the ongoing activities of this organization for the last two years. The CCIA draws its membership from all four colleges in FDU and is the focal point of cyber defense education at FDU.
2015: Completed mapping of FDU courses to the NSA & DHS specified Knowledge Units (KU) which helped FDU getting re-designated as a National Center of Academic Excellence in Cyber Defense Education (CAE/CDE) by the National Security Agency (NSA) and the Department of Homeland Security (DHS) valid through the academic year 2020.
2014: Proposed and got CEPC approvals to offer three new courses and two new concentrations in BSCS and BSIT programs.
May 2014: Planned, invited speakers and participated in the second Cybersecurity Symposium at FDU held in the Lenfell Hall.
May 2013: Planned, invited speakers and helped organize the first Cybersecurity Symposium at FDU.held in the Metropolitan campus.
2013: Applied for and got FDU designated as a National Center of Academic Excellence in Information Assurance Education (CAE/IAE) by the NSA and the DHS.
2012: Mapped FDU cyber courses to CNSS4011 and CNSS4013 training standards.
Muscarelle Building 116
Fairleigh Dickinson University
1000 River Road
Teaneck, NJ 07666